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RFC 12 - IMP-Host Interface Flow Diagrams

  • Status: Unknown
  • Published: August 1969
  • Stream: Legacy
  • Errata: No Errata

Document Information​

  • RFC Number: 12
  • Title: IMP-Host Interface Flow Diagrams
  • Authors: M. Wingfield
  • Date: August 1969
  • Category: Unknown

Abstract​

RFC 12 presents two flow diagrams of the IMP-HOST interface, extracted from the logic diagrams provided in Appendix B of BBN Report No. 1822. They show the logical sequence of the hardware operations performed inside the interface. The first diagram follows the IMP-to-HOST message path: it starts input, clears the LAST, IMPERR, PAD, IN REQST and COUNTER registers, reads the RFNIB, IMP READY and LAST IMP BIT conditions, sets the IMP ERROR and PAD flags, and ends with the pulse shift register incrementing the counter. The second follows the HOST-to-IMP message path: it starts output, sets OUT REQST and clears the shift register, loads the shift register after the STROBE DATA WORD test, and then tests the RFNBIT, WORD LENGTH, LSTWD and LIBIT conditions before clearing the counter. The logic names appearing in the blocks correspond to the logic elements found in Appendix B.

Table of Contents​